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PCS3P624Z0XYG-16-SR 参数 Datasheet PDF下载

PCS3P624Z0XYG-16-SR图片预览
型号: PCS3P624Z0XYG-16-SR
PDF下载: 下载PDF文件 查看货源
内容描述: 高频定时- SAFE™峰值EMI降低IC [High Frequency Timing-Safe™ Peak EMI reduction IC]
分类和应用: 时钟发生器微控制器和处理器外围集成电路光电二极管
文件页数/大小: 15 页 / 547 K
品牌: PULSECORE [ PulseCore Semiconductor ]
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PCS3P624Z05B/C  
PCS3P624Z09B/C  
May 2008  
rev 0.1  
Electrical Characteristics  
Parameter  
Description  
Test Conditions  
Min  
Typ  
Max  
Unit  
V
VIL  
VIH  
IIL  
Input LOW Voltage5  
Input HIGH Voltage5  
Input LOW Current  
Input HIGH Current  
Output LOW Voltage6  
Output HIGH Voltage6  
Dynamic Supply Current  
Output Impedance  
0.8  
2.0  
V
VIN = 0V  
50  
100  
0.4  
µA  
µA  
V
IIH  
VIN = VDD  
VOL  
VOH  
IDD  
Zo  
IOL = 8mA  
IOH = -8mA  
2.4  
V
Unloaded outputs  
40  
mA  
23  
Note: 5. CLKIN input has a threshold voltage of VDD/2  
6. Parameter is guaranteed by design and characterization. Not 100% tested in production  
Switching Characteristics  
Parameter  
Test Conditions  
Min  
50  
Typ  
Max  
Unit  
MHz  
MHz  
%
Input Frequency  
100  
100  
60  
Output Frequency  
30pF load  
50  
Duty Cycle 7,8 = (t2 / t1) * 100  
Output Rise Time 7, 8  
Output Fall Time 7, 8  
Output-to-output skew 7, 8  
Delay, CLKIN Rising Edge to  
CLKOUT Rising Edge 8  
Measured at VDD/2  
40  
50  
Measured between 0.8V and 2.0V  
Measured between 2.0V and 0.8V  
All outputs equally loaded  
2.5  
2.5  
250  
nS  
nS  
pS  
Measured at VDD /2  
±350  
pS  
Measured at VDD/2 on the CLKOUT pins  
of the device  
Device-to-Device Skew 8  
Cycle-to-Cycle Jitter 7, 8  
PLL Lock Time 8  
700  
±200  
1.0  
pS  
pS  
Loaded outputs  
Stable power supply, valid clock presented  
on CLKIN pin  
mS  
Note: 7. All parameters specified with 30pF loaded outputs.  
8. Parameter is guaranteed by design and characterization. Not 100% tested in production  
High Frequency Timing-Safe™ Peak EMI Reduction IC  
6 of 15  
Notice: The information in this document is subject to change without notice.  
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