September 2006
rev 0.2
PCS2P5T915A
Test Circuits and Conditions
VDDI
3 inch, -50Ω
R1
R2
Transmission Line
VDDQ
VIN
VDD
A
A
VDDI
D.U.T.
Pulse
3 inch, -50Ω
Generator
R1
R2
Transmission Line
Test Circuit for Differential Input1
Differential Input Test Conditions
Symbol
R1
VDD= 2.5V ± 0.1V
Unit
100
100
Ω
Ω
V
R2
VDDI
VCM*2
HSTL: Crossing of A and A
eHSTL: Crossing of A and A
LVEPECL: Crossing of A and A
1.8V LVTTL: VDDI/2
VTHI
V
2.5V LVTTL: VDD/2
Note: 1. This input configuration is used for all input interfaces. For single-ended testing, the VIN input is tied to GND. For testing single-ended in differential input
mode, the VIN is left floating.
Low Voltage (2.5V) High Accuracy 1:5 Clock Fan-Out Buffer
19 of 23
Notice: The information in this document is subject to change without notice.
PULSECORE [ PulseCore Semiconductor ]
