September 2006
rev 0.2
PCS2P5T915A
VIH
VTHI
VIL
A
A
VIH
VTHI
VIL
VIH
VTHI
VIL
GL
tPLH
VIH
VTHI
VIL
Gx
Qn
tPGD
tPGE
VOH
VTHO
VOL
SDR Gate Disable/Enable Showing Runt Pulse Generation
Note: As shown, it is possible to generate runt pulses on gate disable and enable of the outputs. It is the user's responsibility to time their Gx signals to avoid this
problem.
Low Voltage (2.5V) High Accuracy 1:5 Clock Fan-Out Buffer
18 of 23
Notice: The information in this document is subject to change without notice.