Released
PMC-Sierra, Inc.
PM9311/2/3/5 ETT1™ CHIP SET
Data Sheet
PMC-2000164
ISSUE 3
ENHANCED TT1™ SWITCH FABRIC
Figure 49. Cell Latency
1
2
Crossbar
Input Data Slice
Output Data Slice
Flow Control
Crossbar
Output EPP
Input EPP
Scheduler
1.11.4 LCS Hole Request to Hole Grant Latency
This is the maximum latency from when a hole request arrives at the Dataslice (1 in Figure 47.) to when
the hole request is granted (2). The egress cell does not contain a valid cell at the requested priority.
This maximum latency for ETT1 is 64 cell times.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
107