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PM8621 参数 Datasheet PDF下载

PM8621图片预览
型号: PM8621
PDF下载: 下载PDF文件 查看货源
内容描述: NSE- 8G⑩标准产品数据表初步 [NSE-8G⑩ Standard Product Data Sheet Preliminary]
分类和应用:
文件页数/大小: 184 页 / 957 K
品牌: PMC [ PMC-SIERRA, INC ]
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NSE-8G™ Standard Product Data Sheet  
Preliminary  
Register 101H + N*20H, R8TD Interrupt Status  
Bit  
Bit 31:8  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3:0  
Type  
Function  
Unused  
FUOI  
LCVI  
OFAI  
Default  
X
X
X
X
X
X
R
R
R
R
OCAI  
Unused  
These registers reports interrupt status due to change of character alignment events and detection  
of line code violations for the R8TD block.  
OCAI  
The out-of-character-alignment interrupt status bit (OCAI) reports and acknowledges change  
of character alignment state events for the R8TD block. OCAI is set high when the character  
alignment block changes state to the out-of-character-alignment state or to the in-character-  
alignment state since the last clear for the register. OCAI is cleared on a read to this register  
when WCIMODE is logic 0. OCAI is cleared on a write (of any value) to this register when  
WCIMODE is logic one. INTB is asserted low when both OCAE and OCAI are high. If  
OCAE is asserted, OCAI must be cleared before INTB will be reasserted.  
OFAI  
The out-of-frame-alignment interrupt status bit (OFAI) reports and acknowledges change of  
frame alignment state events for the R8TD block. OFAI is set high when the frame alignment  
block changes state to the out-of-frame-alignment state or to the in-frame-alignment state.  
OFAI is cleared on a read to this register when WCIMODE is logic 0. OFAI is cleared on a  
write (of any value) to this register when WCIMODE is logic one. INTB is asserted low  
when both OFAE and OFAI are high. IF OFAE is asserted, OFAI must be cleared before  
INTB will be reasserted.  
LCVI  
The line code violation event interrupt status bit (LCVI) reports and acknowledges line code  
violation events for the R8TD block. LCVI is set high when the character alignment block  
detects a line code violation in the incoming data stream. LCVI is cleared on a read to this  
register when WCIMODE is logic 0. LCVI is cleared on a write (of any value) to this register  
when WCIMODE is logic one. INTB is asserted low when both LCVE and LCVI are high. IF  
LCVE is asserted, LCVI must be cleared before INTB will be reasserted.  
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use  
Document ID: PMC-2010850, Issue 1  
99  
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