PM7384 FREEDM-84P672
DATA SHEET
PMC-1990445
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 84P672
SERR:
The System Error (SERR) bit is set high whenever the GPIC asserts the
SERRB output. The SERR bit is cleared by the PCI Host.
PERR:
The Parity Error (PERR) bit is set high whenever the GPIC detects a parity
error, even if parity error handling is disabled by clearing PERREN in the
Command register. The PERR bit is cleared by the PCI Host.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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