RELEASED
PM7383 FREEDM-32A256
DATASHEET
PMC-2010336
ISSUE 1
FRAME ENGINE AND DATA LINK MANAGER 32A256
Symbol
tS
Description
Min
Max
Units
RD[31:0] Set-Up Time
5
ns
RD_8MVIP
(8.192 Mbps H-MVIP Mode)
tH
RD[31:0] Hold Time
5
ns
RD_8MVIP
RFPB
(8.192 Mbps H-MVIP Mode)
tS
tH
RFPB[3:0] Set-Up Time
RFPB[3:0] Hold Time
RFP8B Set-Up Time
RFP8B Hold Time
50
50
50
50
15
0
ns
ns
ns
ns
ns
ns
RFPB
TS
TH
RFP8B
RFP8B
TBD
tS
tH
TBD Set-Up Time (See Note 9)
TBD Hold Time
TBD
Notes on Input Timing:
1. When a set-up time is specified between an input and a clock, the set-up time is the
time in nanoseconds from the 1.4 Volt point of the input to the 1.4 Volt point of the
clock.
2. When a hold time is specified between an input and a clock, the hold time is the time
in nanoseconds from the 1.4 Volt point of the clock to the 1.4 Volt point of the input.
3. Applicable only to channelised T1/J1 links and measured between framing bits.
4. Applicable only to channelised E1 links and measured between framing bytes.
5. Applicable only to unchannelised links of any format and measured between any two
RCLK rising edges.
6. Applicable only to 2.048 Mbps H-MVIP links and measured between any two
RMVCK[n] falling edges.
7. Applicable only to 8.192 Mbps H-MVIP links and measured between any two
RMV8DC falling edges.
8. Applicable only to H-MVIP links and measured between any two RMV8FPC falling
edges.
PROPRIETARY AND CONFIDENTIAL
207
PMC [ PMC-SIERRA, INC ]
