RELEASED
PM7383 FREEDM-32A256
DATASHEET
PMC-2010336
ISSUE 1
FRAME ENGINE AND DATA LINK MANAGER 32A256
selected TCLK[n] is buffered and placed on TBCLK. The transmit BERT data
(TBD) is sampled on the rising edge of the TBCLK and transferred to the
selected TD[n] on the falling edge of TCLK[n].
Figure 30 – Transmit BERT Port Timing
TCLK[n]
TBCLK
B1 B2 B3 B4 X B5 X
B1 B2 B3 B4
X X B6 B7 B8 B1 X B2
TBD
B5
B6 B7 B8 B1
TD[n]
PROPRIETARY AND CONFIDENTIAL
201