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PM7380-PI 参数 Datasheet PDF下载

PM7380-PI图片预览
型号: PM7380-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 帧引擎和数据链路管理32P672 [FRAME ENGINE AND DATA LINK MANAGER 32P672]
分类和应用:
文件页数/大小: 332 页 / 2479 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM7380 FREEDM-32P672  
DATA SHEET  
PMC-1990262  
ISSUE 5  
FRAME ENGINE AND DATA LINK MANAGER 32P672  
Receive Packet Queues  
Receive Packet Queues are used to transfer RPDRs between the host and the  
RMAC672. There are three queues: a RPDR Large Buffer Free Queue  
(RPDRLFQ), a RPDR Small Buffer Free Queue (RPDRSFQ) and a RPDR Ready  
Queue (RPDRRQ). The free queues contain RPDRs referencing RPDs that  
define free buffers. The ready queue contains RPDRs referencing RPDs that  
define buffers ready for host processing. The RMAC672 pulls RPDRs from the  
free queues when it needs free data buffers. The RMAC672 places an RPDR  
onto the ready queue after it has filled the buffers with data from each complete  
packet. The host removes RPDRs from the ready queue to process the data  
buffers. The host places the RPDRs back onto the free queues after it finishes  
reading the data from the buffers.  
When starting to process a packet, the RMAC672 uses a small buffer RPD to  
store the first buffer of packet data. If the packet data requires more than one  
buffer, the RMAC672 uses large buffer RPDs to store the remainder of the  
packet. The RMAC672 links together all the RPDs required to store the packet  
and returns the RPDR associated with the first RPD onto the ready queue.  
All receive packet queues reside in host memory and are defined by the Rx  
Queue Base (RQB) register and index registers which reside in the RMAC672.  
The Rx Queue Base is the base address for the receive packet queues. Each  
packet queue has four index registers which define the start and end of the  
queue and the read and write locations of the queue. Each index register is 16  
bits in length and defines an offset from the Rx Queue Base. Thus, as shown in  
the Figure 7, the host address of a RPDR is calculated by adding the index  
register to the Rx Queue Base register. The host initializes the Rx Queue Base  
register and all the index registers. When an entity (either the RMAC672 or the  
host) removes elements from a queue, the entity updates the read pointer for  
that queue. When an entity (either the RMAC672 or the host) places elements  
onto a queue, the entity updates the write pointer for that queue.  
The read index for each queue points to the last valid RPDR read while the write  
index points to where the next RPDR can be written. The start index points to the  
first valid location within the queue; an RPDR can be written to this location.  
However, the end index points to a location that is beyond a queue; an RPDR  
can not be written to this location. Note however, the start index of one queue  
can be set to the end index of another queue. A queue is empty when the read  
index is one less than the write index; a queue is also empty if the read index is  
one less than the end index and the write index equals the start index. A queue is  
full when the read index is equal to the write index. Figure 7 shows the RPDR  
reference queues.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
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