RELEASED
PM7380 FREEDM-32P672
DATA SHEET
PMC-1990262
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 32P672
17
FREEDM-32P672 TIMING CHARACTERISTICS
(T = -40°C to +85°C, V = 3.0 V to 3.6 V, V = 2.3 V to 2.7V)
DD2.5
A
DD3.3
Table 35 – FREEDM-32P672 Link Input (Figure 43 to Figure 46)
Symbol
Description
Min
Max
Units
RCLK[31:0] Frequency (See Note 3)
RCLK[31:0] Frequency (See Note 4)
RCLK[2:0] Frequency (See Note 5)
RCLK[31:3] Frequency (See Note 5)
RCLK[31:0] Duty Cycle
1.542
2.046
1.546
2.050
51.84
10
MHz
MHz
MHz
MHz
%
40
60
RMVCK[3:0] Frequency (See Note 6)
RMVCK[3:0] Duty Cycle
4.092
40
4.100
60
MHz
%
RMV8DC Frequency (See Note 7)
RMV8DC Duty Cycle
RMV8FPC Frequency (See Note 8)
RMV8FPC Duty Cycle
RMV8DC to RMV8FPC skew
SYSCLK Frequency
SYSCLK Duty Cycle
16.368 16.400 MHz
40
4.092
40
-10
†
60
4.100
60
%
MHz
%
tP
tS
10
ns
MVC
RD
45
60
MHz
%
40
1
RD[2:0] Set-Up Time
ns
tH
RD[2:0] Hold Time
2
ns
RD
tS
tH
RD[31:3] Set-Up Time
5
ns
RD
RD[31:3] Hold Time
5
ns
RD
tS
RD[31:0] Set-Up Time (2.048 Mbps H-
5
ns
RD_2MVIP
MVIP Mode)
tH
RD[31:0] Hold Time (2.048 Mbps H-
MVIP Mode)
5
5
ns
ns
RD_2MVIP
tS
RD[31:0] Set-Up Time (8.192 Mbps H-
RD_8MVIP
MVIP Mode)
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
308