RELEASED
PM7380 FREEDM-32P672
DATA SHEET
PMC-1990262
ISSUE 5
FRAME ENGINE AND DATA LINK MANAGER 32P672
(TBD) is sampled on the rising edge of the TBCLK and transferred to the
selected TD[n] on the falling edge of TCLK[n].
Figure 42 – Transmit BERT Port Timing
TCLK[n]
TBCLK
B1 B2 B3 B4 X B5 X
B1 B2 B3 B4
X X B6 B7 B8 B1 X B2
TBD
B5
B6 B7 B8 B1
TD[n]
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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