RELEASED
PM7366 FREEDM-8
DATA SHEET
PMC-1970930
ISSUE 4
FRAME ENGINE AND DATA LINK MANAGER
Notes on Output Timing:
1. Output propagation delay time is the time in nanoseconds from the 1.4 Volt point of the
reference signal to the 1.4 Volt point of the output.
2. Maximum and minimum output propagation delays are measured with a 50 pF load on all the
outputs, except for PCI Bus outputs and TD[2:0] outputs. For PCI Bus outputs, maximum
output propagation delays are measured with a 50 pF load while minimum output propagation
delays are measured with a 0 pF load. For TD[2:0] outputs, propagation delays are measured
with a 20 pF load. Maximum propagation delay for TD[2:0] increases by 1.0 ns for each 10 pF
of extra load.
3. Output propagation delays of signal outputs that are specified in relation to a reference output
are measured with a 50 pF load on both the signal output and the reference output.
4. Applicable only to channelised T1 links and measured between framing bits.
5. Applicable only to channelised E1 links and measured between framing bytes.
6. Applicable only to unchannelised links of any format and measured between any two TCLK
rising edges.
7. Output tri-state delay is the time in nanoseconds from the 1.4 Volt point of the reference signal
to the point where the total current delivered through the output is less than or equal to the
leakage current.
Figure 40 – Transmit Link Output Timing
TCLK[n]
tPTD
TD[n]
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
265
PMC [ PMC-SIERRA, INC ]
