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PM7366-PI 参数 Datasheet PDF下载

PM7366-PI图片预览
型号: PM7366-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 帧引擎和数据链路管理器 [FRAME ENGINE AND DATA LINK MANAGER]
分类和应用: 微控制器和处理器串行IO控制器通信控制器外围集成电路数据传输PC时钟
文件页数/大小: 286 页 / 2211 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM7366 FREEDM-8  
DATA SHEET  
PMC-1970930  
ISSUE 4  
FRAME ENGINE AND DATA LINK MANAGER  
Register 0x3C : Interrupt Line / Interrupt Pin / MIN_GNT / MAX_LAT  
Bit  
Type  
Function  
Default  
Bit 31  
to  
Bit 24  
R
MAXLAT[7:0]  
0FH  
Bit 23  
to  
R
R
MINGNT[7:0]  
INTPIN[7:0]  
INTLNE[7:0]  
05H  
01H  
00H  
Bit 16  
Bit 15  
to  
Bit 8  
Bit 7  
to  
Bit 0  
R/W  
INTLNE[7:0]:  
The Interrupt Line (INTLNE[7:0]) field is used to indicate interrupt line routing information. The  
values in this register are system specific and set by the PCI Host.  
INTPIN[7:0]:  
The Interrupt Pin (INTPIN[7:0]) field is used to specify the interrupt pin the GPIC uses. Since  
the GPIC will use INTAB on the PCI bus, the value in this register is set to one.  
MINGNT[7:0]:  
The Minimum Grant (MINGNT[7:0]) field specifies how long of a burst period the bus master  
needs (in increments of 250 nsec).  
MAXLAT[7:0]:  
The Maximum Latency (MAXLAT[7:0]) field specifies how often a bus master needs access to  
the PCI bus (in increments of 250 nsec).  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA,INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
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