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PM7351-BGI 参数 Datasheet PDF下载

PM7351-BGI图片预览
型号: PM7351-BGI
PDF下载: 下载PDF文件 查看货源
内容描述: [Support Circuit, 1-Func, CMOS, PBGA304, 31 X 31 MM, 1.51 MM HEIGHT, 1.27 MM PITCH, SBGA-304]
分类和应用: ATM异步传输模式电信电信集成电路
文件页数/大小: 174 页 / 1840 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM7351 S/UNI-VORTEX  
DATA SHEET  
PMC-1980582  
ISSUE 5  
OCTAL SERIAL LINK MULTIPLEXER  
Registers 0x098, 0x0B8, 0x0D8, 0x0F8, 0x118, 0x138, 0x158, 0x178:  
Bit Oriented Code Receiver Enable  
Bit  
Type  
Function  
Default  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Unused  
Unused  
Unused  
Unused  
Unused  
IDLE  
X
X
X
X
X
0
R/W  
R/W  
R/W  
AVC  
BOCE  
0
0
This register selects the validation criteria to be used in determining a valid bit  
oriented code (BOC) and enables generation of an interrupt on a change in code  
status of the BOC received on RXDn+/-.  
IDLE:  
The IDLE bit enables the assertion of the INTB output when there is a  
transition from a validated BOC to idle code. When IDLE and the Master  
Interrupt Enable bit of the Master Configuration register are set to logic 1, the  
interrupt is enabled.  
AVC:  
The AVC bit position selects the validation criteria used in determining a valid  
BOC. A logic 1 in the AVC bit position selects an alternate validation criterion  
of 4 out of 5 matching BOCs; a logic 0 selects the 8 out of 10 matching BOC  
criterion. Unless fast declaration is necessary, it is recommended that AVC  
be set to logic 0 to improve bit error tolerance.  
BOCE:  
The BOCE bit enables the assertion of the INTB output when a valid BOC is  
detected. When BOCE and the Master Interrupt Enable bit of the Master  
Configuration register are set to logic 1, the interrupt is enabled.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
112  
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