RELEASED
PM7351 S/UNI-VORTEX
DATA SHEET
PMC-1980582
ISSUE 5
OCTAL SERIAL LINK MULTIPLEXER
2. The cell currently being transferred (or about to be transferred)
over the upstream bus must be from the link being reset. Note
that if several links are active there is no way for software to
determine which link will be providing the next cell to the
upstream bus.
3. The bus master need not have started the cell transfer (in
response to the asserted RPA from the S/UNI-VORTEX) for cell
corruption to occur. The S/UNI-VORTEX uses a partial look
ahead buffer that cannot be reset by the upstream FIFO reset.
Even if the bus master suspends cell transfers during the time
when the upstream FIFO is reset, the next cell read from the
S/UNI-VORTEX will be corrupted if conditions 1 and 2 existed
during the FIFO reset. The simplest approach is to allow the
bus master to continue normal operation during a FIFO reset. If
required, the bus master can discard any cells received from
that link after it is reset.
Reserved:
This bit should be logic 0 for correct operation.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
115
PMC [ PMC-SIERRA, INC ]
