RELEASED
PM7350 S/UNI-DUPLEX
DATA SHEET
PMC-1980581
ISSUE 5
DUAL SERIAL LINK PHY MULTIPLEXER
Fig. 4 S/UNI-DUPLEX to S/UNI-DUPLEX Applications
LVDS
S/UNI-
S/UNI-
Bus
Bus
DUPLEX
DUPLEX
master
master
8 bit bus
16 bit bus
Example of on-card bus conversion:
8 bit bus master to 16 bit bus master
LVDS
S/UNI-
S/UNI-
Bus
Bus
DUPLEX
DUPLEX
master
slave
Example of basic bus extension between cards
Framer #1
LVDS
S/UNI-
S/UNI-
Bus
Framer #2
DUPLEX
DUPLEX
master
Clock + data
8/16 bit bus
Example of on-card I.432 processing
Fig. 5 S/UNI-DUPLEX to S/UNI-DUPLEX Protection Switching
Framer # 16
S/UNI-
S/UNI-
Bus
Bus
DUPLEX
DUPLEX
master
slave
S/UNI-
S/UNI-
Bus
Bus
DUPLEX
DUPLEX
master
slave
Example of protection switching between cards
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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