RELEASED
PM7350 S/UNI-DUPLEX
DATA SHEET
PMC-1980581
ISSUE 5
DUAL SERIAL LINK PHY MULTIPLEXER
PMCTST:
The PMCTST bit is used to configure the S/UNI-DUPLEX for PMC's
manufacturing tests. When PMCTST is set to logic one, the S/UNI-DUPLEX
microprocessor port becomes the test access port used to run the PMC
"canned" manufacturing test vectors. The PMCTST bit is logically "ORed"
with the IOTST bit, and can be cleared by setting CSB to logic one or by
writing logic zero to the bit.
PMCATST:
The PMCATST bit is used to configure the analog portion of the S/UNI-
DUPLEX for PMC's manufacturing tests. PMCATST is cleared when CSB is
high and RSTB is low or when PMCATST is written as logic 0.
Register 0x83: Miscellaneous Test
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
Unused
TCADIS
X
X
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
LINKSELBP
SELOCD
CKLSEL[2]
CLKSEL[1]
CLKSEL[0]
CLKSEL[2:0]:
The CLKSEL[2:0] bits can be used to output a internally generated clock on
the RX8K output to increase the observability of the device for test purpose.
When CLKSEL[2:0] is set to 0b00 (default mode), the RX8K output is
extracted from one of the receive high-speed serial links, RXD1+/- or
RXD2+/-. When set to other values, an internally generated clock is muxed
on the RX8K output, as described in the following table:
CLKSEL[2:0]
00000
Clock
RX8K
ACT_RCLK
SYSCLK
00001
00010
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
172
PMC [ PMC-SIERRA, INC ]
