RELEASED
PM7350 S/UNI-DUPLEX
DATA SHEET
PMC-1980581
ISSUE 5
DUAL SERIAL LINK PHY MULTIPLEXER
Register 0x6C:
Receive Serial Indirect Channel HCS Error Count
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R
R
R
R
R
R
R
R
HCSERR[7]
HCSERR[6]
HCSERR[5]
HCSERR[4]
HCSERR[3]
HCSERR[2]
HCSERR[1]
HCSERR[0]
X
X
X
X
X
X
X
X
This register contains data read from the channel provision RAM of the Receive
Clocked Serial Data Interface after an indirect read operation.
HCSERR[7:0]:
The HCSERR[7:0] bits indicate the number of HCS error events that occurred
during the last accumulation interval of the receive Clock Serial Data
Interface. When the number of HCS error events during the last accumulation
interval exceeds 255, the HCSERR[7:0] retains value of FFH until the next
accumulation interval.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
164
PMC [ PMC-SIERRA, INC ]
