RELEASED
PM7350 S/UNI-DUPLEX
DATA SHEET
PMC-1980581
ISSUE 5
DUAL SERIAL LINK PHY MULTIPLEXER
Register 0x06: Extended Address Match (LSB)
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
XAD[7]
XAD[6]
XAD[5]
XAD[4]
XAD[3]
XAD[2]
XAD[1]
XAD[0]
0
0
0
0
0
0
0
0
XAD[7:0]
This register in conjunction with the XAD[10:8]bits of the Extended Address
Match (MSB) register is used in the selection of the SCI-PHY/Any-PHY input
port for cell transfer when operating in Any-PHY bus slave mode (ANYPHY
input set to logic 1, IMASTER input set to logic 0). Cells are accepted if the
value in the Extended Address field of the prepend is equal with the
XAD[10:0] bits over the range of bits specified by the Extended Address Mask
registers.
When operating the SCI-PHY/Any-PHY output port in bus slave (OMASTER
input set to logic 0), the XAD[2:0] bits are inserted in the three most
significant bits of the Extended Address field of the prepend in the eight bit
format and the XAD[11:0] bits are inserted in the 11 most significant bits of
the Extended Address field of the prepend in 16 bit format.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
96
PMC [ PMC-SIERRA, INC ]
