RELEASED
PM7350 S/UNI DUPLEX
DATA SHEET
PMC-1980581
ISSUE 8
DUAL SERIAL LINK PHY MULTIPLEXER
Fig. 8 Cell delineation State Diagram
The values of ALPHA and DELTA determine the robustness of the delineation
method. ALPHA determines the robustness against false misalignments due to
bit errors. DELTA determines the robustness against false delineation in the
synchronization process. ALPHA is chosen to be 7 and DELTA is chosen to be 6.
The loss of cell delineation (LCD) alarm is declared after a programmable
threshold of incorrect cells occurs while in the HUNT state. The threshold is set
by the Receive Serial LCD Count Threshold register. The threshold has a default
value of 104 which translates to 73 ms at 600 kbs.All idle cells are filtered out
and not passed to the high-speed interface. They are identified as cells
containing all zeros VPI, and VCI fields and a one in the CLP bit. Optionally,
unassigned cells (like idle cells except CLP is a zero) may also be filtered.
All cells with an incorrect HCS octet are filtered out. Header correction is not
implemented.
As an option configured in Receive Serial Indirect Channel Configuration register
(0x69), the ATM Transmission Convergence functions can be disabled to provide
a clear channel capability. In this case, the serial data is segmented into 53 byte
packets independent of the contents, and then transported across the high-speed
LVDS links.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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