RELEASED
PM7350 S/UNI DUPLEX
DATA SHEET
PMC-1980581
ISSUE 8
DUAL SERIAL LINK PHY MULTIPLEXER
16
MICROPROCESSOR INTERFACE TIMING CHARACTERISTICS
(T = -40°C to +85°C, V = 3.3 V ±10%)
A
DD
Microprocessor Interface Read Access (Fig. 28)
Symbol
tS
Parameter
Min
10
5
Max
Units
ns
Address to Valid Read Set-up Time
Address to Valid Read Hold Time
Address to Latch Set-up Time
Address to Latch Hold Time
AR
tH
ns
AR
tS
10
10
ns
ALR
tH
ns
ALR
L
tV
tS
Valid Latch Pulse Width
20
0
ns
ns
ns
ns
ns
ns
LR
Latch to Read Set-up
tH
LR
Latch to Read Hold
5
tP
Valid Read to Valid Data Propagation Delay
Valid Read Negated to Output Tri-state
Valid Read Negated to Output Tri-state
70
20
50
RD
tZ
RD
tZ
INTH
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
217