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PM7350-PGI 参数 Datasheet PDF下载

PM7350-PGI图片预览
型号: PM7350-PGI
PDF下载: 下载PDF文件 查看货源
内容描述: [Support Circuit, 1-Func, CMOS, PBGA160, 15 X 15 MM, 1.81 MM HEIGHT, PLASTIC, BGA-160]
分类和应用: ATM异步传输模式电信电信集成电路
文件页数/大小: 245 页 / 898 K
品牌: PMC [ PMC-SIERRA, INC ]
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RELEASED  
PM7350 S/UNI DUPLEX  
DATA SHEET  
PMC-1980581  
ISSUE 8  
DUAL SERIAL LINK PHY MULTIPLEXER  
Register 0x30: RXD1 Extract FIFO Control  
Bit  
Type  
Function  
Default  
Bit 7  
Bit 6  
Bit 5  
Bit 4  
Bit 3  
Bit 2  
Bit 1  
Bit 0  
Unused  
Unused  
X
X
X
X
X
X
0
Unused  
Unused  
Unused  
Unused  
R/W  
R/W  
UPF1OVRE  
UPF1RST  
0
UPF1RST:  
The UPF1RST bit is used to reset the Microprocessor Cell Extract FIFO  
associated with RXD1+/-. When UPF1RST is set to logic 0, the FIFO  
operates normally. When UPF1RST is set to logic 1, all the FIFO is  
immediately emptied and ignores writes. The FIFO remains empty and  
continues to ignore writes until logic 0 is written to UPF1RST.  
UPF1OVRE:  
The UPF1OVRE bit enables the assertion of the INTB output due to an  
overflow error condition of the Microprocessor Cell Extract FIFO associated  
with RXD1+/-. When UPF1OVRE is set to logic 1, the interrupt is enabled.  
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE  
133  
 
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