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PM7348 参数 Datasheet PDF下载

PM7348图片预览
型号: PM7348
PDF下载: 下载PDF文件 查看货源
内容描述: [ATM/SONET/SDH IC, CMOS, PBGA324,]
分类和应用: ATM异步传输模式
文件页数/大小: 318 页 / 1736 K
品牌: PMC [ PMC-SIERRA, INC ]
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S/UNI-IMA-4 Telecom Standard Product Data Sheet  
Released  
Figure 21 IMA Error/Maintenance State Diagram  
Persistence of non-IMA Sync  
Leaving IMA  
Sync state  
( +2) IMA frames  
Out of IMA  
Frame (OIF)  
Anomaly  
State  
IMA  
LIF  
Working State  
Defect  
Entering IMA  
Sync state  
Persistence of IMA SYNC for at least 2 IMA frames  
The IMA Working state enables the RDAT to write user cells to the DCB. If the IFSM leaves  
the IMA Sync state, the IESM state machine will transition to the OIF Anomaly state, and the  
OIF anomaly counter will be incremented.  
In the OIF Anomaly state, incoming user cells are written as filler cells to the DCB, and write  
pointers are incremented. If the IFSM does not return to the IMA Sync state within gamma + 2  
frames, the IESM state will transition to the LIF Defect state. (Gamma is programmable, and is  
the same gamma used in the IFSM). If the IMA Sync state is entered prior to gamma + 2  
frames, the IESM state will transition back to the IMA Working State. This is considered a “fast  
recovery” from the OIF Anomaly.  
In the LIF Defect state, incoming user cells are written as filler cells to the DCB, and write  
pointers are incremented. The LIF-latched status bit will be set in the link-context memory. The  
IESM state machine will transition to the IMA Working state when IMA Sync has been detected  
for two consecutive IMA frames. If the IMA Sync state is entered and then exited during LIF,  
then the OIF anomaly counter will be incremented. When the IESM enters the working state,  
user cells may be forwarded once again if an overrun (with respect to the configured depth for  
the link) is not detected. The overrun detection provides the necessary differential-delay  
checking required after a defect.  
Loss of Cell Delineation Status (LCD)  
LCD is detected by the TC layer and the information is passed to the RDAT. When a link is in  
LCD, a LCD-latched status bit is set in link context memory, which is cleared by the ICP cell  
processing procedure. Cells received while the LCD latched status bit is set will be written to  
the DCB as filler cells, and the write pointers will be incremented. After an LCD condition is  
exited, the delay synchronization of the link must be rechecked and resynchronized.  
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.  
Document No.: PMC-2020889, Issue 2  
66