S/UNI-IMA-4 Telecom Standard Product Data Sheet
Released
Register 0x310: RDAT Master Interrupt Register
Bit
15
14:3
2
1
0
Type
RO
Function
Reserved
Unused
TC_OVERRUN
Reserved
ATM_CONG
Default
0
0
0
0
0
R2C
RO
RO
ATM_CONG
When set, this bit indicates that an interrupt bit is set in the Receive ATM Congestion
Interrupt register. This bit will be clear when no interrupt conditions are present in that
register, or when the conditions are not enabled using the Receive ATM Congestion
Interrupt Enable register.
TC_OVERRUN
When set, this bit indicates that a Link FIFO overrun has occurred on the physical link
indicated in the TC Overrun status register. Note that Link FIFO overrun will occur only if
the setup procedures are not followed properly by PM. This bit is not used to report
overruns on Physical Links that are allocated to IMA Groups. This bit will clear when this
register is read.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2020889, Issue 2
232
PMC [ PMC-SIERRA, INC ]
