S/UNI-IMA-4 Telecom Standard Product Data Sheet
Released
Register 0x30A: Receive ATM Congestion Interrupt
Bit
15:8
7:0
Type
Function
Unused
CONG[7:0]
Default
0
0
R2C
The status in this register is latched, and it is cleared when read.
CONG[7:0]
CONG[7:0] is a bit-vector indicating on which channel a cell was dropped at the Receive
Cell Interface.
In UTOPIA-2 Multi-Address mode, a set bit indicates that a cell has been dropped on the
corresponding channel due to a full RXAPS FIFO.
In Any-PHY and UTOPIA-2 Single Address modes, bit 0 set indicates that a cell has been
dropped because the single shared RXAPS FIFO is full, or because 16 cells are already
stored in the FIFO for the current IMA Group or TC Link Bits 7:1 are unused.
Read the Receive ATM Congestion Count Register (MEM_SELECT=0xD) to determine the
total number of cells dropped.
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
Document No.: PMC-2020889, Issue 2
230
PMC [ PMC-SIERRA, INC ]
