Released
Datasheet
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATM Traffic Management Device
Table 7. Signal Locations (Continued)
Ball
Signal Name
Ball
Signal Name
Ball
Signal Name
Ball
Signal Name
Ball
Signal Name
AE2 TX_DRAM_AD AF2 TX_DRAM_DA AG TX_DRAM_AD AH TX_DRAM_DD( AJ2 VSS
1
D(6)
AE2 TX_DRAM_DA AF2
TA(4)
1
TA(2)
21
D(8)
21
2)
1
/
AG TX_DRAM_AD AH TX_DRAM_DA AJ2 VSS
2
2
TX_DRAM_CS( 22
0)
D(4)
22
TA(3)
2
AE2 TX_DRAM_DA AF2 TX_DRAM_DA AG TX_DRAM_DA AH
TA(18) TA(9) 23 TA(5) 23
/
AJ2 VSS
3
3
3
TX_DRAM_CS(
1)
AE2 TX_DRAM_DA AF2 TX_DRAM_DA AG TX_DRAM_DA AH TX_DRAM_DA AJ2 TX_DRAM_DA
TA(11) TA(8) 24 TA(6) 24 TA(1) TA(7)
4
4
4
AE2 VDD
5
AF2 TX_DRAM_DA AG TX_DRAM_DA AH TX_DRAM_DA AJ2 VSS
TA(16) 25 TA(14) 25 TA(10)
5
5
AE2 TX_DRAM_DA AF2 TX_DRAM_DA AG TX_DRAM_DA AH TX_DRAM_DA AJ2 VSS
TA(20) TA(17) 26 TA(13) 26 TA(12)
6
6
6
AE2 TX_DRAM_DA AF2 TX_DRAM_DA AG TX_DRAM_DA AH TX_DRAM_DA AJ2 VDD
7
TA(25)
7
TA(23)
27
TA(19)
27
TA(15)
7
AE2 TX_DRAM_DA AF2 TX_DRAM_DA AG TX_DRAM_DA AH VSS
AJ2 VSS
8
8
TA(29)
8
TA(24)
28
TA(21)
28
AE2 VSS
9
AF2 VSS
9
AG VSS
29
AH VDD
29
AJ2 VDD
9
4.3 Signal Descriptions (372 Signal Pins)
All inputs and Bidirectional inputs have internal pull up circuit except for /OE input. /OE has an
internal pull down circuit.
All 5V tolerant/ LVTTL inputs have a Schmitt Trigger Hysteresis circuit.
All CMOS inputs are not 5V tolerant.
63
PMC [ PMC-SIERRA, INC ]
