Released
Datasheet
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATM Traffic Management Device
®
The National Semiconductor serializer/deserializer chipsets, the DS90CR283/284 and the
DS90CR285/286, are 5V and 3.3 V devices, respectively, that run at 66 MHz. They use the EIA-
644 Low Voltage Differential Standard (LVDS) to send the signals differentially at a rate of up to
462 Mbit/s per LVDS data chennel. The setup and hold times match leaving the QRT/QSE. Com-
ing into the QRT/QSE, the phase aligners are turned on.
These devices are best suited for gang four applications, where the 16 data lines and a single copy
of the SOC can be accommodated with a single chipset.
In certain 3-stage fabrics, the BPACK and data can share the serializer: 16 data lines, a single
copy of the SOC and the four BPACK signals. This occurs in situations where the first and last
stages are on the same card and the second stage is on another card.
The chipset spec requires that skew must be tightly controlled between all the LVDS pairs, and all
of the outputs must go to the same place.
The web site for the devices is:
http://www.national.com/pf/DS/DS90CR283.html
http://www.national.com/pf/DS/DS90CR284.html
http://www.national.com/pf/DS/DS90CR285.html
http://www.national.com/pf/DS/DS90CR286.html
228
PMC [ PMC-SIERRA, INC ]
