Released
Datasheet
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATM Traffic Management Device
8 INTERNAL RAM MEMORY MAP
8.1 Internal RAM Summary
The internal RAM contains the following RAM regions:
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Transmit Service Class RAM (TSC_RAM) 2560 × 16
Receive Service Class RAM (RSC_RAM) 388 × 16
Virtual Output Control RAM (VO_RAM) 256 × 16
Receive Switch Fabric Control RAM (RSF_CONTROL_RAM) 40 × 32
Transmit Switch Fabric Control RAM (TSF_CONTROL_RAM) 12 × 28
Receive UTOPIA RAM (RU_RAM) 64 × 32 (4 cell buffers)
Transmit UTOPIA RAM (TU_RAM) 48 × 32 (3 cell buffers)
Receive Switch Element RAM (RS_RAM) 128 × 32 (8 cell buffers)
Transmit Switch Element RAM (TS_RAM) 192 × 32 (12 cell buffers)
Queue Engine Registers.
Table 25. Internal RAM Summary
Byte Address Long Address
Name
Description
400000-
4027FCh
100000-1009FFh Transmit Service Class RAM Contains the transmit SC queue control block.
(TSC_RAM)
440000-44060Ch 110000-110183h Receive Service Class RAM
(RSC_RAM)
Contains the receive SC RAM.
480000-
4803FCh
120000-1200FFh Virtual Output Control RAM Contains the control tables for the VOs and the direction
(VO_RAM)
control.
4C0000-
4C00A0h
130000-130028h Receive Switch Fabric Con-
trol RAM
Contains the control table for cell buffers in transmission at
the receive switch fabric interfaces.
(RSF_CONTROL_RAM)
500000-50002Ch 140000-14000Bh Transmit Switch Fabric Con- Contains the control table for cell buffers in transmission at
trol RAM
the transmit switch fabric interfaces.
(TSF_CONTROL_RAM)
540000-
5400FCh
150000-15003Fh Test Access to the Receive
UTOPIA RAM (RU_RAM)
Contains the cell buffers for cells headed from the UTOPIA
interface.
580000-5800C0h 160000-160030h Test Access to the Transmit
UTOPIA RAM (TU_RAM)
Contains the cell buffers for cells headed toward the UTO-
PIA interface.
5C0000-
5C01FCh
170000-17007Fh Test Access to the Receive
Switch Element RAM
Contains the cell buffers for cells headed toward the switch
fabric.
(RS_RAM)
600000-
6002FCh
180000-1800BFh Test Access to the Transmit
Switch Element RAM
Contains the cell buffers for cells coming from the switch
fabric.
(TS_RAM)
7C0000-
7C004Ch
1F0000-1F0013h Queue Engine Registers
For information, refer to sections “QUEUE ENGINE
CONDITION_PRES_BITS” on page 132,
“RX_DIR_STATE (Internal Structure)” on page 140,
“TX_DIR_CONFIG” on page 141, and “TX_DIR_STATE
(Internal Structure)” on page 141.
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