Released
Datasheet
PM73487 QRT
PMC-Sierra, Inc.
PMC-980618
Issue 3
622 Mbps ATM Traffic Management Device
7. 2. 21. QUEUE_ENGINE_INT_MASK
Address: 2Ch (B0h byte)
Read/Write
Function: The following MASK_ bits disable the generation of an interrupt through the INTR
pin. They do not, however, affect the operation of the associated interrupt or status
bits.
Reset Value:1
Format:
Field (Bits)
Description
MASK_AB_RAM_PARITY_FAIL
(31)
1
0
Mask the AB_RAM_PARITY_FAIL interrupt.
Enable this interrupt.
MASK_SF_FABRIC_NOT_SYNC
1
0
Mask the The RX_CELL_START pulse not occuring at exactly 118
SF_CLK clock interval interrupt
Enable this interrupt.
_FAIL
(30)
Not used
(29:27)
Write with a 1 to maintain future software compatibility.
MASK_CH_UNUSED_VCI_SET
(26)
1
0
Mask the CH_UNUSED_VCI_SET interrupt.
Enable this interrupt.
MASK_QE_TX_SCG_FAIL
(25)
1
0
Mask the QE_TX_SCG_FAIL interrupt.
Enable this interrupt.
MASK_QE_RX_SCG_FAIL
(24)
1
0
Mask the QE_RX_SCG_FAIL interrupt.
Enable this interrupt.
MASK_QE_TX_LOWER12_SCG_
1
0
Mask the QE_TX_LOWER12_SCG_QD_NEG interrupt.
Enable this interrupt.
QD_NEG
(23)
MASK_QE_TX_LOWER8_SCG_
1
0
Mask the QE_TX_LOWER8_SCG_QD_NEG interrupt.
Enable this interrupt.
QD_NEG
(22)
MASK_QE_TX_LOWER4_SCG_
1
0
Mask the QE_TX_LOWER4_SCG_QD_NEG interrupt.
Enable this interrupt.
QD_NEG
(21)
MASK_QE_TX_DIR_QD_NEG
(20)
1
0
Mask the QE_TX_DIR_QD_NEG interrupt.
Enable this interrupt.
MASK_QE_RX_LOWER48_SCG_
1
0
Mask the QE_RX_LOWER48_SCG_QD_NEG interrupt.
Enable this interrupt.
QD_NEG
(19)
MASK_QE_RX_LOWER32_SCG_
1
0
Mask the QE_RX_LOWER32_SCG_QD_NEG interrupt.
Enable this interrupt.
QD_NEG
(18)
MASK_QE_RX_LOWER16_SCG_
1
0
Mask the QE_RX_LOWER16_SCG_QD_NEG interrupt.
Enable this interrupt.
QD_NEG
(17)
MASK_QE_RX_DIR_QD_NEG
(16)
1
0
Mask the QE_RX_DIR_QD_NEG interrupt.
Enable this interrupt.
138
PMC [ PMC-SIERRA, INC ]
