S/UNI®-JET Data Sheet
Released
Register 30CH: SPLT Configuration
Bit
Type
R/W
R/W
R/W
R/W
R/W
R/W
Function
FORM[1]
FORM[0]
M1TYPE
M2TYPE
FIXSTUFF
PLCPEN
Unused
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
0
0
0
0
X
0
R/W
EXT
EXT
The EXT bit disables the internal transmission system sublayer timeslot counter from
identifying DS1, DS3, E1, J2, E3 G.751, or E3 G.832 overhead bits. The EXT bit allows
transmission formats that are unsupported by the internal timeslot counter and must be
supported using the TIOHM input. When a logic zero is written to EXT, input transmission
system overhead (for DS1, DS3, E1, J2, E3 G.751, and E3 G.832 formats) is indicated using
the internal timeslot counter. This counter “flywheels” to create the appropriate transmission
system alignment. This alignment is indicated on the TOHM output. When a logic one is
written to EXT, indications on TIOHM identify each transmission system overhead bit. These
indications flow through the S/UNI-JET and appear on the TOHM output where they mark
the transmission system overhead placeholder positions in the TDATO stream. EXT should
only be set to logic one if the TFRM[1:0] bits in the S/UNI-JET Transmit Configuration
Register are both set to logic one and the arbitrary framing format is desired.
PLCPEN
The PLCPEN bit enables PLCP frame insertion. When a logic one is written to PLCPEN,
DS3, E3 G.751, DS1, or E1 PLCP framing is inserted. The PLCP format is specified by the
FORM[1:0] bits in this register. When a logic zero is written to PLCPEN, PLCP related
functions in the SPLT block are disabled. The PLCPEN bit must be set to logic zero for G.832
E3, J2, and arbitrary framing formats.
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990267, Issue 3
106
PMC [ PMC-SIERRA, INC ]
