PM7346 S/UNI-QJET
DATASHEET
PMC-960835
ISSUE 6
SATURN QUAD USER NETWORK INTERFACE FOR J2, E3, T3
that no events are missed. The data is then available in the holding registers
until the next accumulation. In addition to the two counters, a record of the 32
bits received immediately prior to the accumulation is available.
The PRGD may also be programmed to check for repetitive sequences. When
configured to detect a pattern of length N bits, the PRGD will load N bits from the
detected stream, and determine whether the received pattern repeats itself every
N subsequent bits. Should it fail to find such a pattern, it will continue loading
and checking until it finds a repetitive pattern. All the features (error counting,
auto-synchronization, etc.) available for pseudo-random sequences are also
available for repetitive sequences. Whenever a PRGD accumulation is forced,
the PRGD stores a snapshot of the 32 bits received immediately prior to the
accumulation. This snapshot may be examined in order to determine the exact
nature of the repetitive pattern received by PRGD.
The pseudo-random or repetitive pattern can be inserted/extracted in the PLCP
payload (if PLCP framing is enabled) or in the DS3, E3, J2, or Arbitrary framing
format payload (if PLCP framing is disabled). It cannot be inserted into the ATM
cell payload.
9.13 DS3Transmitter
The DS3 Transmitter (T3-TRAN) Block integrates circuitry required to insert the
overhead bits into a DS3 bit stream and produce a B3ZS-encoded signal. The
T3-TRAN is directly compatible with the M23 and C-bit parity DS3 formats.
Status signals such as far end receive failure (FERF), the alarm indication signal,
and the idle signal can be inserted when their transmission is enabled by internal
register bits. FERF can also be automatically inserted on detection of any
combination of LOS, OOF or RED, or AIS by the T3-FRMR.
A valid pair of P-bits is automatically calculated and inserted by the T3-TRAN.
When C-bit parity mode is selected, the path parity bits, and far end block error
(FEBE) indications are automatically inserted.
When enabled for C-bit parity operation, the FEAC channel is sourced by the
XBOC bit-oriented code transmitter. The path maintenance data link messages
are sourced by the TDPR data link transmitter. These overhead signals can also
be overwritten by using the TOH[x] and TOHINS[x] inputs.
When enabled for M23 operation, the C-bits are forced to logic 1 with the
exception of the C-bit Parity ID bit (first C-bit of the first M-subframe), which is
forced to toggle every M-frame.
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA INC., AND ITS CUSTOMERS’ INTERNAL USE 73