PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
This block monitors the transmit AMI-coded T1 stream, detecting when the
stream is about to violate the ANSI T1.403 12.5% pulse density rule over a
moving 192-bit window. If a density violation is detected, the XPDE can be
enabled to insert a logic 1 into the digital stream to ensure the resultant output no
longer violates the pulse density requirement. When the XPDE is disabled from
inserting logic 1s, the transmit stream from the TRAN is passed through
unaltered.
9.12 T1 Bit Oriented Code Generator (XBOC)
The Bit Oriented Code Generator function is provided by the XBOC block. This
block transmits 63 of the possible 64 bit oriented codes in the facility data link
channel in T1-ESF framing format, as defined in ANSI T1.403.
Bit oriented codes are transmitted on the facility data link channel as a 16-bit
sequence consisting of 8 ones, a zero, 6 code bits, and a trailing zero
(111111110xxxxxx0) which is repeated as long as the code is not 111111. The
transmitted bit oriented codes have priority over any data transmitted on the
facility data link except for ESF yellow CFA. The code to be transmitted is
programmed by writing the code register.
9.13 T1 HDLC Transmitter (T1 XFDL)
The HDLC Transmitter function is provided by the XFDL block. This block
interfaces with the TRAN block. The XFDL is used under microprocessor or
DMA control to transmit HDLC data frames in the facility data link for the T1-ESF
frame format, or in timeslot 16 or the National bits of timeslot 0 for the E1 frame
format.
The XFDL performs all of the data serialization, CRC generation, zero-bit
stuffing, as well as flag, idle, and abort sequence insertion. Data to be
transmitted is provided on an interrupt-driven basis by writing to a double-
buffered transmit data register. A CRC-CCITT frame check sequence is
appended to the data frame, followed by idle flag sequences. If the transmit data
register underflows, an abort sequence is automatically transmitted.
When enabled for use, the XFDL continuously transmits the flag character
(01111110). Data bytes to be transmitted are written into the Transmit Data
Register. After the parallel-to-serial conversion of each data byte, an interrupt is
generated to signal the controller to write the next byte into the Transmit Data
Register. After the last data frame byte is transmitted, the CRC word (if CRC
insertion has been enabled), or a flag (if CRC insertion has not been enabled) is
transmitted. The XFDL then returns to the transmission of flag characters.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
48
PMC [ PMC-SIERRA, INC ]
