PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
RXCP configuration/control registers. More precisely, filtering is performed when
filtering is enabled or when HCS errors are found when HCS checking is
enabled. Otherwise, all cells are passed on regardless of any error conditions.
Cells are dropped if the HCS pattern is invalid or if the filtering 'Match Pattern'
and 'Match Mask' registers are programmed with a certain blocking pattern. Idle
cells are not automatically filtered. If they are required to be filtered, then that
filtering criterion (i.e. the cell header pattern) must be programmed through the
Idle/Unassigned Cell Pattern and Mask registers. For ATM cells,
Idle/Unassigned cells are identified by the standardized header pattern of 'H00,
'H00, 'H00 and 'H01 in the first 4 octets followed by the valid HCS octet.
While the cell delineation state machine is in the SYNC state, the HCS
verification circuit implements the state machine shown in figure 10.
In normal operation, the HCS verification state machine remains in the
'Correction' state. Incoming cells containing no HCS errors are passed to the
receive FIFO. Incoming single-bit errors are optionally corrected, and the
resulting cell is passed to the FIFO. Upon detection of a single-bit error or a
multi-bit error, the state machine transitions to the 'Detection' state.
A programmable hysteresis is provided when dropping cells based on HCS
errors. When a cell with an HCS error is detected, the RXCP can be
programmed to continue to discard cells until m (where m = 1, 2, 4, 8) cells are
received with correct HCS. The mth cell is not discarded (see Figure 16). Note
that the dropping of cells due to HCS errors only occurs while the cell delineation
state machine is in the SYNC state (see Figure 15).
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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PMC [ PMC-SIERRA, INC ]
