PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
Registers 042H, 142H, 242H and 342H: XIBC Control
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
EN
UF
0
0
Unused
Unused
Unused
Unused
CL1
X
X
X
X
0
R/W
R/W
CL0
0
These registers control the transmission of T1 inband loopback activate and
deactivate codes.
EN:
The EN bit controls whether the inband code is transmitted or not. A logic 1
in the EN bit position enables transmission of inband codes; a logic 0 in the
EN bit position disables inband code transmission.
UF:
The UF bit controls whether the code is transmitted framed or unframed. A
logic 1 in the UF bit position selects unframed inband code transmission; a
logic 0 in the UF bit position selects framed inband code transmission. Note:
the UF register bit controls the T1-TRAN directly and is not qualified by the
EN bit. When UF is set to logic 1, the TRAN is disabled and no framing is
inserted regardless of the setting of EN. The UF bit should only be written to
logic 1 when the EN bit is set, and should be cleared to logic 0 when the EN
bit is cleared.
CL1, CL0:
The bit positions CL[1:0] (bits 1 & 0) of this register indicate the length of the
inband loopback code sequence, as follows:
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
149
PMC [ PMC-SIERRA, INC ]
