PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
Registers 023H, 123H, 223H and 323H: E1-FRMR Maintenance/Alarm Status
Interrupt Enable
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RRAE
Reserved
AISDE
Reserved
REDE
AISE
FEBEE
CRCEE
0
0
0
0
0
0
0
0
Reserved:
The reserved bits must be programmed to logic 0 for correct operation.
RRAE , AISDE, REDE, and AISE:
A logic one in bits RRAE, AISDE, REDE, or AISE enables the generation of
an interrupt on a change of state of the RRA, AISD, RED, and AIS bits,
respectively, of the E1-FRMR Maintenance/Alarm Status register.
FEBEE:
When the FEBEE bit is a logic one, an interrupt is generated when a logic
zero is received in the Si bits of frames 13 or 15.
CRCEE:
When the CRCEE bit is a logic one, an interrupt is generated when
calculated CRC differs from the received CRC remainder.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
121
PMC [ PMC-SIERRA, INC ]
