PM7344 S/UNI-MPH
DATA SHEET
PMC-950449
ISSUE 6
MULTI-PHY USER NETWORK INTERFACE
Registers 021H, 121H, 221H and 321H: E1-FRMR Maintenance Mode
Options
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/WBit2C
R/W
R/W
R/W
R/W
R
FASC
0
0
Reserved
Reserved
RADEB
Reserved
CMFACT
EXCRCE
0
0
0
0
X
X
R
Reserved:
The reserved bits must be programmed to logic 0 for correct operation.
FASC:
The FASC bit selects the criterion used to declare loss of frame alignment
signal: a logic 0 in the FASC bit position enables declaration of loss of frame
alignment when 3 consecutive frame alignment patterns have been received
in error; a logic 1 in the FASC bit position enables declaration of loss of frame
when 4 consecutive frame alignment pattern errors are detected.
BIT2C:
The BIT2C bit enables the additional criterion that loss of frame is declared
when bit 2 in time slot 0 of NFAS frames has been received in error on 3
consecutive occasions: a logic 1 in the BIT2C position enables declaration of
loss of frame alignment when bit 2 is received in error; a logic 0 in BIT2C
enables declaration of loss of frame alignment based on the setting of FASC,
only.
RADEB:
The RADEB bit selects the amount of debouncing applied to the Remote
Alarm Indication before the RRA is allowed to change state: a logic 0 in the
RADEB bit position enables the RRA output to change to the logic value
contained in the Remote Alarm bit position (bit 3 of NFAS frames) when the
received Remote Alarm bit value has been in the same state for 2
consecutive NFAS frames; a logic 1 in the RADEB bit position enables the
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
118
PMC [ PMC-SIERRA, INC ]
