PM7340 S/UNI-IMA-8
PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
DATA SHEET
PMC-2001723
ISSUE 3
INVERSE MULTIPLEXING OVER ATM
9.4 Microprocessor Interface (31 Signals)
Pin Name
Type
Pin
No.
Function
D[15]
D[14]
D[13]
D[12]
D[11]
D[10]
D[9]
I/O
B18
B17
D18
C16
A17
B16
C15
D17
A16
B15
A15
B14
A14
D14
C13
B13
The Micro Data (D[15:0]) signals provide a data bus
to allow the S/UNI-IMA-8 device to interface to an
external microprocessor. Both read and write
transactions are supported. The microprocessor
interface is used to configure and monitor the S/UNI-
IMA-8 device.
D[8]
D[7]
D[6]
D[5]
D[4]
D[3]
D[2]
D[1]
D[0]
A[10]
A[9]
A[8]
A[7]
A[6]
A[5]
A[4]
A[3]
A[2]
A[1]
Input
Input
A13
D13
C12
B12
D12
A11
B11
D10
A10
B10
The Micro Address (A[10:1]) signals provide an
address bus to allow the S/UNI-IMA-8 device to
interface to an external microprocessor.
The A[10:1] indicate a word address. The S/UNI-
IMA-8 microprocessor interface is not byte
addressable.
The A[10:1] input signals are sampled while the ALE
is asserted high.
ALE
C10
The Address Latch Enable (ALE) is an active high
signal that latches the A[10:1] signals during the
address phase of a bus transaction. When ALE is set
high, the address latches are transparent. When ALE
is set low, the address latches hold the address
provided on A[10:1].
The ALE input has an internal pull-up resistor.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
26
PMC [ PMC-SIERRA, INC ]
