PM7340 S/UNI-IMA-8
PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
DATA SHEET
PMC-2001723
ISSUE 3
INVERSE MULTIPLEXING OVER ATM
9.3 Transmit Slave Interface (UTOPIA L2 mode) (26 Signals)
Pin Name
Type
Pin
No.
Function
TCLK
Input
E19 The Transmit Clock (TCLK) signal is used to
transfer cells across the ANY-PHY interface to the
internal downstream cell buffers.
The TCA output is updated on the rising edge of
TCLK.
The TENB, TSOC, TDAT[15:0], TPRTY, TADR[4:0]
inputs are sampled on the rising edge of TCLK.
The TCLK input must cycle at a 52 MHz or lower
instantaneous rate.
TCA
Tristate
Output
L22 The Transmit Cell Available (TCA) is an active high
signal that indicates the availability of space in the
selected logical channel FIFO when polled using the
TADR[4:0] signals.
The S/UNI-IMA-8 drives TCS with the cell space
availability status for the polled port one TCLK cycle
after a valid TADR[4:0] address is sampled.
The TCA output is high-impedance when not polled.
The TCA output is updated on the rising edge of
TCLK.
TENB
Input
Input
L20 The Transmit enable bar (TENB) is an active low
signal that is used to indicate cell transfers to the
internal cell buffers.
The TENB input is sampled on the rising edge of
TCLK.
TADR[4]
TADR[3]
TADR[2]
TADR[1]
TADR[0]
K21 The Transmit Address (TADR[4:0]) signals are
K20 used to address logical channels for the purposes of
J19 polling and device selection.
J22
The TADR[4:0] input bus is sampled on the rising
J21
edge of TCLK.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
24