PM7340 S/UNI-IMA-8
PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
DATA SHEET
PMC-2001723
ISSUE 3
INVERSE MULTIPLEXING OVER ATM
Register 0x014: TC Interrupt Enable Register
Bit
Type
Function
Default
15:4
RO
Unused
0
0
0
0
0
3
2
1
0
R/W
R/W
R/W
R\W
HCS_ERR_EN
LCD_ERR_EN
FOVR_ERR_EN
OOCD_ERR_EN
The above enable-bits provide a global enable for the corresponding interrupt bits
in the TC Interrupt FIFO. If an enable-bit is not set, the corresponding error event
will not cause an entry to be written into the TC_INTR FIFO. When an enable-bit
is set to a logic 1, the corresponding error event, if enabled for the link, will cause
an entry to be written into the TC INTR FIFO.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
110
PMC [ PMC-SIERRA, INC ]
