RELEASED
PM73123 AAL1GATOR-8
DATASHEET
PMC-2000097
ISSUE 2
8 LINK CES/DBCES AAL1 SAR
16.8 LINE I/F Timing
16.8.1 Direct Low Speed Timing
16.8.1.1 Transmit
Table 39 Transmit Low Speed Interface Timing
Symbol
Description
Min Max Units
f
TL_CLK Frequency
TL_CLK Duty Cycle
0
15
60
MHz
%
T
d
40
10
T
tS
tH
tP
Input Set-up time to falling edge of
TL_CLK
ns
Input Hold time from falling edge
TL_CLK
10
3
ns
ns
TL_CLK High to Output Valid
15
Figure 130 Transmit Low Speed Interface Timing
TL_CLK
tH
tS
TL_SYNC(I)
tP
TL_DATA
TL_SIG
TL_SYNC(o)
Notes on Transmit Low Speed Timing:
1. Outputs are driven using the rising edge of TL_CLK and inputs are expected
to be driven using the rising edge of TL_CLK.
2. Inputs are latched using the falling edge of TL_CLK.
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL
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