欢迎访问ic37.com |
会员登录 免费注册
发布采购

PM73123-PI 参数 Datasheet PDF下载

PM73123-PI图片预览
型号: PM73123-PI
PDF下载: 下载PDF文件 查看货源
内容描述: 8 LINK CES / DBCES AAL1 SAR [8 LINK CES/DBCES AAL1 SAR]
分类和应用:
文件页数/大小: 364 页 / 2908 K
品牌: PMC [ PMC-SIERRA, INC ]
 浏览型号PM73123-PI的Datasheet PDF文件第299页浏览型号PM73123-PI的Datasheet PDF文件第300页浏览型号PM73123-PI的Datasheet PDF文件第301页浏览型号PM73123-PI的Datasheet PDF文件第302页浏览型号PM73123-PI的Datasheet PDF文件第304页浏览型号PM73123-PI的Datasheet PDF文件第305页浏览型号PM73123-PI的Datasheet PDF文件第306页浏览型号PM73123-PI的Datasheet PDF文件第307页  
RELEASED  
PM73123 AAL1GATOR-8  
DATASHEET  
PMC-2000097  
ISSUE 2  
8 LINK CES/DBCES AAL1 SAR  
STCTEST  
The single transport chain instruction is used to test out the TAP controller and  
the boundary scan register during production test. When this instruction is the  
current instruction, the boundary scan register is connected between TDI and  
TDO. During the Capture-DR state, the device identification code is loaded into  
the boundary scan register. The code can then be shifted out output, TDO using  
the Shift-DR state.  
Boundary Scan Cells  
In the following diagrams, CLOCK-DR is equal to TCK when the current  
controller state is SHIFT-DR or CAPTURE-DR, and unchanging otherwise. The  
multiplexer in the center of the diagram selects one of four inputs, depending on  
the status of select lines G1 and G2. The ID Code bit is as listed in the Boundary  
Scan Register table in the JTAG Test Port section 11.2.  
Figure 79 Input Observation Cell (IN_CELL)  
IDCODE  
Scan Chain Out  
INPUT  
to internal  
Input  
Pad  
logic  
G1  
G2  
SHIFT-DR  
1 2  
1 2  
1 2  
1 2  
D
MUX  
C
I.D. Code bit  
CLOCK-DR  
Scan Chain In  
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL  
303  
 复制成功!