RELEASED
PM73123 AAL1GATOR-8
DATASHEET
PMC-2000097
ISSUE 2
8 LINK CES/DBCES AAL1 SAR
11
NORMAL MODE REGISTER DESCRIPTION
Normal mode registers are used to configure and monitor the operation of the
AAL1gator-8. Internal Registers are selected when A[19] is high. Normal mode
registers are selected when A[18] is low. Test registers are accessed when both
A[19] and A[18] are high.
Notes on Normal Mode Register Bits:
1. Writing values into unused register bits has no effect. However, to ensure
software compatibility with future, feature-enhanced versions of the product,
unused register bits must be written with logic zero unless stated otherwise.
Reading back unused bits can produce either a logic one or a logic zero;
hence, unused register bits should be masked off by software when read.
2. All configuration bits that can be written into can also be read back. This
allows the processor controlling the AAL1gator to determine the programming
state of the block.
3. Writable normal mode register bits are cleared to logic zero upon reset unless
otherwise noted.
4. Writing into read-only normal mode register bit locations does not affect
AAL1gator operation unless otherwise noted.
5. Certain register bits are reserved. To ensure that the AAL1gator operates as
intended, reserved register bits must be written with their default value as
indicated by the register bit description.
The register memory map is arranged as follows:
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