RELEASED
PM73123 AAL1GATOR-8
DATASHEET
PMC-2000097
ISSUE 2
8 LINK CES/DBCES AAL1 SAR
Register 0x80000: Reset and Device ID Register (DEV_ID_REG)
Bit
Type
Function
Default
15
R/W
Rsvd
R
SW_RESET
Unused
1
X
14:7
6:4
DEV_TYPE[2:0]
010
3:0
R
DEV_ID[3:0]
0010
DEV_ID[3:0]
The ID bits can be read to provide a binary number indicating the AAL1gator-
8 feature version. These bits are incremented only if features are added in a
revision of the chip. Note that “0010” indicates Revision C. Earlier revisions
will have different values (0000 = Rev A, 0001 = Rev B).
DEV_TYPE[2:0]
The TYPE bits can be read to distinguish the AAL1gator-8 from other
members of the AAL1gator family.
• 011 = AAL1gator-32
• 010 = AAL1gator-8
SW_RESET
When set, causes all of the device to be held in reset including all other
registers. While set, the external SSRAM may not be accessed. This is a
chip software reset.
0) Chip is active
1) Chip is in reset
Notes:
1) Software should ensure that the RUN bit in DLL_STAT_REG reads back a
1 before releasing the AAL1gator-8 from software reset.
2) Software should wait 2 clock periods of the slowest clock before attempting
to write to any other register. Exception to this rule is the DLL register port.
PMC-SIERRA, INC. PROPRIETARY AND CONFIDENTIAL
239
PMC [ PMC-SIERRA, INC ]
