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PM73121-RI 参数 Datasheet PDF下载

PM73121-RI图片预览
型号: PM73121-RI
PDF下载: 下载PDF文件 查看货源
内容描述: AAL1分段重组处理器 [AAL1 Segmentation And Reassembly Processor]
分类和应用: ATM集成电路SONET集成电路SDH集成电路电信集成电路电信电路异步传输模式
文件页数/大小: 223 页 / 2148 K
品牌: PMC [ PMC-SIERRA, INC ]
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PM73121AAL1gator II  
Data Sheet  
PMC-Sierra, Inc.  
PMC-980620  
,VVXHꢀꢁ  
AAL1 SAR Processor  
8.10.4 SRTS E1 Clock  
15  
The E1 SRTS clock jitter was measured using a 2 -1 PRBS pattern in unstructured mode.  
Two AAL1gator IIs were connected to each other across a point-to-point ATM connection. One  
AAL1gator II was used to generate SRTS values, and the other AAL1gator II was used to receive  
the values. The source AAL1gator II was connected to a FIREBERD, which used an external  
signal generator as its clock source. The clock source was stepped across the entire ± 90 ppm  
range and the jitter was measured at the FIREBERD connected to the AAL1gator II at the  
receiving end. A jitter spectrum was then taken at the frequency that exhibited the worst jitter.  
The total maximum jitter without the jitter attenuator was 0.845 UI. With a jitter attenuator the  
maximum jitter was 0.42 UI. See Figure 104 through Figure 107 on page 193 for jitter versus  
frequency and the jitter spectrum versus the G.824 mask.  
2
1.8  
1.6  
1.4  
1.2  
1
0.8  
0.6  
0.4  
0.2  
0
2047700 2047800 2047900 2048000 2048100 2048200 2048300  
Frequency +/- 100 ppm  
Figure 104. Maximum E1 SRTS Jitter with no Jitter Attenuator  
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