PMC-Sierra, Inc.
PM6541 E1XC-EVBD
TELECOM STANDARD PRODUCT
PMC-930917
ISSUE 1
E1XC EVALUATION DAUGHTERBOARD
Signal
Type
Ref.
Description
Spare1_CSB
Spare2_CSB
O
O
J28-1 Spare CSB pin address (C2XX)
J28-2 Spare CSB pin address (C3XX)
3.3
DIP Switches
One 8 bit dip switch is provided on the daughterboard. This switch controls the
operating modes of MT8940 PLL chip and the output enables for the various clock
outputs. When open, each bit line is pulled high. When closed, the bit lines are
individually pulled to ground. For a brief description of the MT8940 operating
modes, consult the tables in the Clock PLL implementation description section.
Switch ID
Clock 1
Clock 2
Clock 3
Clock 4
Clock 5
Clock 6
Clock 7
Clock 8
Mapping
MS0
MS1
MS2
MS3
ENC2O
ENCV
ENC4O
Unused
11