PM6341 E1XC
DATA SHEET
PMC-910419
ISSUE 8
E1 FRAMER/TRANSCEIVER
3. Check that the correct 7-bit FAS is present in the assumed timeslot 0 byte of
the next frame.
If either of the conditions in steps 2 or 3 are not met, a new search for frame
alignment is initiated in the bit immediately following the errored timeslot 0 byte
location.
The second algorithm is similar to the first, but adds a one frame "hold-off" in
step 2 to begin a new search in the bit immediately following the second 7-bit
FAS that is checked. This "hold-off" is performed only the condition in step 2
fails, providing a more robust algorithm which allows the framer to operate
correctly in the presence of fixed timeslot data imitating the FAS pattern.
A check sequence can be added to either algorithm to verify correct frame
alignment in the presence of random imitative FASs. Note that this check
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sequence should be enabled when monitoring an unframed 2 -1 pseudo
random sequence to avoid framing to the single mimic framing pattern contained
in the sequence. The check consists of verifying correct frame alignment for an
additional two frames, as follows:
• once frame alignment (in frame "n") is determined, check that the FAS is
absent in the following frame (frame "n+1") by verifying that bit 2 of timeslot 0
is a logic 1;
• then, check that the correct 7-bit FAS is present in timeslot 0 of the next
frame (frame "n+2").
If either of the two conditions in the check sequence are not met, a new search
for frame alignment is initiated in the bit immediately following the errored byte
location when using the first algorithm, and is initiated in the bit immediately
following the byte location in frame "n+2" when using the second algorithm.
These algorithms are illustrated in Figure 7.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
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PMC [ PMC-SIERRA, INC ]
