PM6341 E1XC
DATA SHEET
PMC-910419
ISSUE 8
E1 FRAMER/TRANSCEIVER
Register 15H: XPLS Block Control/Status
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Unused
Unused
Unused
Unused
TAIS
X
X
X
X
0
R/W
R
DPMV
DPMI
X
X
0
R
R/W
DPME
TAIS:
The TAIS bit enables the XPLS to generate an unframed all-ones AIS alarm
on the TAP and TAN output pins. When TAIS is set to logic 1, the outputs are
forced to pulse alternately, creating an all-ones signal. When TAIS is set to
logic 0, the outputs operate normally.The transition to transmitting AIS is
done in such a way as to not introduce any bipolar violations.
DPMV:
The DPMV bit reflects the current state of the DPM alarm signal.
DPMI:
The DPMI bit is set to logic 1 when any change of state occurs on the Driver
Performance Monitor (DPM) alarm signal.This bit is cleared when the register
is read.
DPME:
The DPME bit controls the generation of an interrupt on the microprocessor
INTB pin by the driver performance monitor portion of XPLS. When DPME is
set to logic 1, an interrupt is generated on INTB whenever an alarm condition
occurs on the driver performance monitor points. A driver performance
monitor alarm is declared whenever a period of 63 consecutive bit periods
with no pulses on either the TAN or TAN output pins occurs. When DPME is
set to logic 0, detection of a driver performance monitor alarm condition is
disabled from generating an interrupt.
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
110
PMC [ PMC-SIERRA, INC ]
