PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
Register 0768H: RXSDQ FIFO Indirect Address
Bit
Type
Function
Default
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
R
R/W
W
BUSY
RWB
X
0
0
X
X
X
X
X
X
X
0
0
0
0
0
0
FLUSH
R
EMPTY
Unused
Unused
Unused
Unused
Unused
Unused
PHYID[5]
PHYID[4]
PHYID[3]
PHYID[2]
PHYID[1]
PHYID[0]
Bit 8
Bit 7
Bit 6
Bit 5
R/W
R/W
R/W
R/W
R/W
R/W
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
This is an indirect register that is used to specify the address of the FIFO that the user is setting
up or reading the setup for. A FIFO needs to be configured according to a set of rules defined in
the Operations section. In order to change the current setup of a FIFO, it is recommended that
the user reads the existing setup information first, makes any modifications as required, and
writes back the information.
PHYID[5:0]:
This is a 6-bit number that is used to describe the current FIFO being addressed by the rest
of the FIFO setup registers – the RXSDQ FIFO Indirect Configuration, RXSDQ FIFO Buffer
Available Threshold, RXSDQ FIFO Data Available Threshold and RXSDQ FIFO Cells and
Packets Count. This field should be set to all zeros.
EMPTY:
This read-only bit indicates if the requested FIFO is empty. When this bit is read as 1, the
FIFO number specified in PHYID[5:0] in this register is empty. Before reconfiguring a
disabled FIFO, this bit needs to be sampled at logic 1 indicating that the FIFO is empty.
FLUSH:
This is a write-only bit used to discard all the current data in a specified FIFO. This should
typically be used if a non-empty FIFO needs to be reconfigured.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
341
PMC [ PMC-SIERRA, INC ]
