PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
transmitted packets (including FCS, Abort, and stuff bytes) after the byte stuffing operation.
Flag bytes will not be counted in either case. The TX_BYTE_MODE bit is only valid when
working in POS mode.
DCRC[7:0]:
The diagnostic CRC word (DCRC[7:0]) configures the ATM or packet processor to logically
invert bits in the inserted CRC on the outgoing data stream for diagnostic purposes. When
any bit in DCRC[7:0] is set to logic 1, the corresponding bit in the FCS value inserted by the
POS processor or the HCS value inserted by the ATM processor is logically inverted.
DCRC[7:0] is ignored when no FCS is inserted. Each DCRC[x] bit will cause a bit error in
each byte of the 2 byte or 4 byte FCS.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
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PMC [ PMC-SIERRA, INC ]
