PMC-Sierra, Inc.
PRELIMINARY
PM5381 S/UNI-2488
DATASHEET
PMC-2000489
ISSUE 1
SATURN USER NETWORK INTERFACE FOR 2488 MBIT/S
Indirect Register 01H: THPP Source and Pointer Control Register
Bit
Type
Function
Default
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
0
Unused
H4MASK
B3MASK
ENG1REC
ENH4MASK
PTBJ1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit 8
SRCZ5
Bit 7
SRCZ4
Bit 6
SRCZ3
Bit 5
SRCF2
Bit 4
SRCREI
SRCRDI
SRCC2
SRCJ1
Bit 3
Bit 2
Bit 1
Bit 0
IBER
IBER:
When the IBER register bit is set to logic one, the G1 byte is generated by the SIRP block.
The THPP overwrites the LSB of the pass-through G1 with a zero logic value. When IBER is
set to logic zero, the G1 byte can be modified by one of the PIBEN:
This bit is only valid for THPP STS-1/STM0 #1.
SRCJ1, SRCC2, SRCF2, SRCZ3, SRCZ4, SRCZ5:
The SRCnn bits are used to determine the source for the path overhead bytes. For example,
when a logic 1 is written to SRCJ1, the J1 byte inserted can be found in the THPP Transmit
C2 and J1 register. When a logic 0 is written to SRCJ1, the J1 byte source can either be the
TPOH input or the TTTP PATH depending on the value of the PTBJ1 register bit that can be
found in this register.
These bits are only valid for THPP STS-1/STM0 #1.
SRCREI:
The valid high SRCREI register bit enables the THPP to overwrite the G1 byte with the REI
field in the THPP Transmit H4 Mask and G1 register. When SRCREI is set to logic zero, the
REI source is other than the THPP Transmit H4 Mask and G1 register.
Proprietary and Confidentail to PMC-Sierra Inc., and for its Customer’s Internal Use
233
PMC [ PMC-SIERRA, INC ]
